Reconstruction-Computation-Quantization (RCQ): A Paradigm for Low Bit Width LDPC Decoding
نویسندگان
چکیده
This paper uses the reconstruction-computation-quantization (RCQ)paradigm to decode low-density parity-check (LDPC) codes. RCQ facilitates dynamic non-uniform quantization achieve good frame error rate (FER) performance with very low message precision. For message-passing according a flooding schedule, parameters are designed by discrete density evolution. Simulation results on an IEEE 802.11 LDPC code show that for 4-bit messages, Min Sum decoder outperforms table-lookup approaches such as information bottleneck (IB) or Min-IB decoding, significantly fewer be stored. Additionally, this introduces layer-specific RCQ, extension of decoding layered architectures. Layer-specific representations best possible FER performance. proposes using evolution featuring hierarchical (HDQ) design efficiently. Finally, studies field-programmable gate array (FPGA) implementations decoders. (9472, 8192) quasi-cyclic (QC) 3-bit messages achieves more than 10% reduction in LUTs and routed nets 6% decrease register usage while maintaining comparable performance, compared 5-bit offset decoder.
منابع مشابه
Search Based Weighted Multi-Bit Flipping Algorithm for High-Performance Low-Complexity Decoding of LDPC Codes
In this paper, two new hybrid algorithms are proposed for decoding Low Density Parity Check (LDPC) codes. Original version of the proposed algorithms named Search Based Weighted Multi Bit Flipping (SWMBF). The main idea of these algorithms is flipping variable multi bits in each iteration, change in which leads to the syndrome vector with least hamming weight. To achieve this, the proposed algo...
متن کاملSearch Based Weighted Multi-Bit Flipping Algorithm for High-Performance Low-Complexity Decoding of LDPC Codes
In this paper, two new hybrid algorithms are proposed for decoding Low Density Parity Check (LDPC) codes. Original version of the proposed algorithms named Search Based Weighted Multi Bit Flipping (SWMBF). The main idea of these algorithms is flipping variable multi bits in each iteration, change in which leads to the syndrome vector with least hamming weight. To achieve this, the proposed algo...
متن کاملQuantization of Three-Bit Logic for LDPC Decoding
This paper presents two related three-bit quantizations for sum-product algorithm LDPC decoding that are suitable for programmable logic. The key aspect of our decoder design is the combining of the parity-check and variable node update steps into a single computation. The performance and the hardware requirements for an FPGA implementation are considered and compared to the work of Planjery e...
متن کاملArchitectures for Decoding of Structured Ldpc Codes Using the On- the –fly Computation Paradigm
Recent research efforts based on joint code-decoder design methodology have shown that it is possible to construct structured LDPC (Low Density Parity Check) codes without any performance degradation. An interesting new data independence property between the two classes of messages viz. check to bit and bit to check involved in decoding, is observed. This property is a result of the specific st...
متن کاملCheck Reliability Based Bit-Flipping Decoding Algorithms for LDPC Codes
We introduce new reliability definitions for bit and check nodes. Maximizing global reliability, which is the sum reliability of all bit nodes, is shown to be equivalent to minimizing a decoding metric which is closely related to the maximum likelihood decoding metric. We then propose novel bit-flipping (BF) decoding algorithms that take into account the check node reliability. Both hard-decisi...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: IEEE Transactions on Communications
سال: 2022
ISSN: ['1558-0857', '0090-6778']
DOI: https://doi.org/10.1109/tcomm.2022.3149913